1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, it relates to a semiconductor device comprising a gate electrode.
2. Description of the Background Art
A MOS transistor is generally known as a semiconductor device comprising a gate electrode. In such a MOS transistor, a gate electrode consisting of a polysilicon layer is formed on a silicon substrate (channel region) through a gate insulating film. A MOS transistor using a high dielectric constant (High-k) insulating film as a gate insulating film is known in general.
In a structure of the conventional MOS transistor, however, in a case where a high dielectric constant insulating film consisting of HfO2 or the like is used as the gate insulating film, for example, silicon included in a gate electrode (polysilicon layer) and a gate insulating film causes an interfacial reaction or the like, thereby disadvantageously causing pinning of the Fermi-level in the gate electrode. Consequently, adjustment of a work function of the gate electrode is difficult, whereby it is disadvantageously difficult to adjust to reduce a threshold voltage of the MOS transistor (semiconductor device).